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A Novel In-memory Matching Circuit Based on Non-volatile Resistive Memory

Trinh, Q.-K. and Duong, Q.-M. and Do, X.-T. and Hoang, V.-P. and Vu, H.-G. and Dinh, V.-N. and Dao, X.-U. (2022) A Novel In-memory Matching Circuit Based on Non-volatile Resistive Memory. In: Conference of 2022 IEEE International Conference on IC Design and Technology, ICICDT 2022, 21 September 2022 Through 23 September 2022, Hanoi.

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Abstract

This paper presents a novel in-memory matching circuit realizing the CAM applications based on Non-volatile resistive memory and 2T-2R bit cell structure that provides reliable lookup operations. The evaluations extended to different NV-RAM types (RRAM, PCRAM, and MRAM) demonstrate the high applicability of our design architecture. The advantages of the CAM matching circuit are verified by Monte Carlo simulations using the 65nm CMOS process technology. Compared to other conventional approaches, our proposed design can reach relatively low sensing latencies, varying from 0.14 to 0.24 ns while maintaining a good level of search error rates. © 2022 IEEE.

Item Type: Conference or Workshop Item (Paper)
Divisions: Faculties > Faculty of Radio-Electronic Engineering
Institutes > Institute of System Integration
Identification Number: 10.1109/ICICDT56182.2022.9933127
Uncontrolled Keywords: Associative storage; Cams; Intelligent systems; MRAM devices; Timing circuits, Area-Efficient; Bit cell; Cell structure; In-memory computing; Low latency; Matching circuit; Nonvolatile; NV-CAM; NV-TCAM; Resistive memory, Monte Carlo methods
Additional Information: Conference of 2022 IEEE International Conference on IC Design and Technology, ICICDT 2022 ; Conference Date: 21 September 2022 Through 23 September 2022; Conference Code:184070
URI: http://eprints.lqdtu.edu.vn/id/eprint/10622

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