Dao, V.-L. and Nguyen, V.-D. and Nguyen, H.-D. and Hoang, V.-P. (2017) Hardware implementation of MFCC feature extraction for speech recognition on FPGA. In: Proceedings of the International Conference on Advances in Information and Communication Technology, ICTA 2016, 12 December 2016 through 13 December 2016.
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Abstract
In this paper, an FPGA-based Mel Frequency Cepstral Coefficient (MFCC) IP core for speech recognition is presented. The implementation results on FPGA show that the proposed MFCC core achieves higher resource usage efficiency compared with other designs. © Springer International Publishing AG 2017.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Divisions: | Faculties > Faculty of Radio-Electronic Engineering |
| Identification Number: | 10.1007/978-3-319-49073-1_27 |
| Uncontrolled Keywords: | Feature extraction; Field programmable gate arrays (FPGA); Hardware; Hardware implementations; IP core; Mel-frequency cepstral coefficients; Resource usage; Speech recognition |
| Additional Information: | Conference code: 187819. Language of original document: English. |
| URI: | http://eprints.lqdtu.edu.vn/id/eprint/9766 |
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