FPGA design and implementation of the detector for the MIMO-SDM system using PNC

Multiple-input multiple-output (MIMO) systems using spatial division multiplexing (SDM) technique have been considered a potential technology for high speed data transmission wireless internet networks, such as IEEE 802.11, 3GPP Long Term Evolution, WiMAX,.. Meanwhile, physical layer network coding (PNC) is a promising technique to increase transmission throughput over bidirectional relay wireless networks. By using MIMO-SDM-PNC, multiplexing gain, spectral efficiency and transmission rates can be increased. But until now, there is no technical paper considering and evaluating the MIMO-SDM-PNC system based on hardware design. In this paper, we propose the design and implementation of two detector architectures at the destination node for MIMO-SDM-PNC system on FPGA. Based on the design, we consider the consumption of FPGA elements in our design and design's complexity. © 2016 IEEE.