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Journals peer-reviewed by Scopus
Tran, T.-H. and Hoang, V.-P. and Le, D.-H. and Hoang, T.-T. and Pham, C.-K. (2024) An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode. In: 2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024, 19 May 2024 Through 22 May 2024, Singapore.
Dam, D.-T. and Nguyen, T.-H. and Tran, T.-H. and Le, D.-H. and Hoang, T.-T. and Pham, C.-K. (2024) High-Efficiency Multi-Standard Polynomial Multiplication Accelerator on RISC-V SoC for Post-Quantum Cryptography. IEEE Access, 12. pp. 195015-195031.
Tran, T.-H. and Le, A.-T. and Hoang, T.-T. and Hoang, V.-P. and Pham, C.-K. (2023) Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to Counter Power Analysis Attacks. In: Conference of 33rd Great Lakes Symposium on VLSI, GLSVLSI 2023, 5 June 2023 Through 7 June 2023, Knoxville.
Hoang, V.-P. and Do, N.-T. and Hoang, T.-T. and Pham, C.-K. (2023) Revealing Secret Key from Low Success Rate Deep Learning-Based Side Channel Attacks. In: UNSPECIFIED.
Dam, D.-T. and Tran, T.-H. and Hoang, V.-P. and Pham, C.-K. and Hoang, T.-T. (2023) A Survey of Post-Quantum Cryptography: Start of a New Race. Cryptography, 7 (3): 40. ISSN 2410387X
Dol, N.-T. and Le, P.-C. and Hoang, V.-P. and Doan, V.-S. and Nguyen, H.G. and Pham, C.-K. (2022) MO-DLSCA: Deep Learning Based Non-profiled Side Channel Analysis Using Multi-output Neural Networks. In: Conference of 15th International Conference on Advanced Technologies for Communications, ATC 2022, 20 October 2022 Through 22 October 2022, Hanoi.
Do, N.-T. and Hoang, V.-P. and Doan, V.S. and Pham, C.-K. (2022) On the performance of non-profiled side channel attacks based on deep learning techniques. IET Information Security.
Duong, T.Q. and Hoang, V.-P. and Pham, C.-K. (2021) Convergence of 5G Technologies, Artificial Intelligence and Cybersecurity of Networked Societies for the Cities of Tomorrow. Mobile Networks and Applications. ISSN 1383469X (In Press)
Ta, V.-T. and Hoang, V.-P. and Pham, V.-P. and Pham, C.-K.
(2020)
An improved all-digital background calibration technique for channel mismatches in high speed time-interleaved analog-to-digital converters.
Electronics (Switzerland), 9 (1): 73.
ISSN 20799292
Nguyen, X.-T. and Hoang, T.-T. and Inoue, K. and Bui, N.-T. and Hoang, V.-P. and Pham, C.-K.
(2019)
A 1.2-v 90-MHz bitmap index creation accelerator with 0.27-nW standby power on 65-nm silicon-on-thin-box (SOTB) CMOS.
In: 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, 26 May 2019 through 29 May 2019.
Hoang, T.-T. and Tran, T.-H. and Hoang, V.-P. and Tran, X.-N. and Pham, C.-K.
(2019)
Hardware trojan detection techniques using side-channel analysis.
In: 6th NAFOSTED Conference on Information and Computer Science, NICS 2019, 12 December 2019 through 13 December 2019.
Hosaka, T. and Hoang, T.-T. and Hoang, V.-P. and Le, D.-H. and Inoue, K. and Pham, C.-K.
(2019)
Live demonstration: Real-time auto-exposure histogram equalization video-system using frequent items counter.
In: 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, 26 May 2019 through 29 May 2019.
Le Duc, H. and Hoang, V.-P. and Nguyen, D.-M. and Pham, C.-K.
(2018)
Hardware Implementation of Background Calibration Technique for TIADCs with Signals in Any Nyquist Bands.
In: 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27 May 2018 through 30 May 2018.
Hoang, V.-P. and Dao, V.-L. and Pham, C.-K.
(2017)
Design of ultra-low power AES encryption cores with silicon demonstration in SOTB CMOS process.
Electronics Letters, 53 (23).
pp. 1512-1514.
ISSN 135194
Hoang, V.-P. and Nguyen, V.-T. and Nguyen, A.-T. and Pham, C.-K.
(2017)
A low power AES-GCM authenticated encryption core in 65nm SOTB CMOS process.
In: 60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017, 6 August 2017 through 9 August 2017.
Hoang, V.-P. and Phan, T.-T.-D. and Dao, V.-L. and Pham, C.-K.
(2016)
A compact, ultra-low power AES-CCM IP core for wireless body area networks.
In: 24th Annual IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, 26 September 2016 through 28 September 2016.
Hoang, V.-P. and Dao, V.-L. and Pham, C.-K.
(2016)
An ultra-low power AES encryption core in 65nm SOTB CMOS process.
In: 13th International SoC Design Conference, ISOCC 2016, 23 October 2016 through 26 October 2016.
Hoang, V.-P. and Do, X.-T. and Pham, C.-K.
(2013)
An efficient ASIC implementation of logarithm approximation for HDR image processing.
In: 2013 International Conference on Advanced Technologies for Communications, ATC 2013, 16 October 2013 through 18 October 2013, Ho Chi Minh.