Ta, V.-T. and Hoang, V.-P. (2020) Sequential all-digital background calibration for channel mismatches in time-interleaved ADC. In: 4th International Conference on Research in Intelligent and Computing in Engineering, RICE 2019, 8 August 2019 through 9 August 2019.
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To achieve high performance, time-interleaved analog-to-digital converters (TIADCs) require channel mismatches calibration. This paper presents a sequential all-digital background calibration technique for three derivations encompassing offset, gain, and timing errors in TIADCs. The average technique is used to remove offset mismatch at each channel. The gain mismatch is calibrated by calculating the power ratio of the sub-ADC over the reference ADC. Timing skew is calibrated by using Hadamard transform for error correction and LMS for estimation of the clock skew. The numerical simulations of the proposed technique show that the performance of TIADCs has significantly improved. © Springer Nature Singapore Pte Ltd. 2020.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Divisions: | Faculties > Faculty of Radio-Electronic Engineering |
| Identification Number: | 10.1007/978-981-15-2780-7_112 |
| Uncontrolled Keywords: | Calibration; Error correction; Hadamard transforms; Intelligent computing; Channel mismatch; Clock skews; Gain mismatch; Power ratio; Time-interleaved ADC; Time-interleaved analog to digital converters; Timing errors; Timing skew; Analog to digital conversion |
| Additional Information: | Conference code: 239099. Language of original document: English. |
| URI: | http://eprints.lqdtu.edu.vn/id/eprint/9153 |
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