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An ASIC implementation of low area AES encryption core for wireless networks

Dao, V.-L. and Nguyen, A.-T. and Hoang, V.-P. and Tran, T.-A. (2016) An ASIC implementation of low area AES encryption core for wireless networks. In: International Conference on Computing, Management and Telecommunications, ComManTel 2015, 28 December 2015 through 30 December 2015.

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Abstract

This paper presents an efficient ASIC implementation of the low area 8-bit AES encryption core using an optimized SBox for wireless networks. The proposed AES core supports 128- bit key length and 128-bit data blocks. The implementation results in a 90nm CMOS standard library show that the proposed AES encryption core has the maximum clock frequency of 452.5 MHz and higher resource usage efficiency compared with other designs. © 2015 IEEE.

Item Type: Conference or Workshop Item (Paper)
Divisions:
Faculties > Faculty of Radio-Electronic Engineering
Identification Number: 10.1109/ComManTel.2015.7394268
Uncontrolled Keywords: Application specific integrated circuits; Wireless networks; 128-bit data; 90-nm cmos; AES encryption; Clock frequency; Key lengths; Resource usage; S-Box; Standard libraries; Cryptography
Additional Information: Conference code: 119276. Language of original document: English.
URI: http://eprints.lqdtu.edu.vn/id/eprint/9852

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