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An Energy Efficient AES Encryption Core for Hardware Security Implementation in IoT Systems

Dao, M.-H. and Hoang, V.-P. and Dao, V.-L. and Tran, X.-T. (2018) An Energy Efficient AES Encryption Core for Hardware Security Implementation in IoT Systems. In: 11th International Conference on Advanced Technologies for Communications, ATC 2018, 18 October 2018 through 20 October 2018.

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Abstract

This paper presents a low energy AES encryption core targeting for hardware security implementation in IoT systems. The proposed AES core architecture employs the improved shared S-box scheme with 32-bit datapath and low switching activity shift-row operation. Consequently, the proposed AES encryption core can provide good tradeoff with the area of 4.3 kgates and the energy consumption of 4 pJ/bit in 32 nm CMOS technology library. © 2018 IEEE.

Item Type: Conference or Workshop Item (Paper)
Divisions: Faculties > Faculty of Radio-Electronic Engineering
Identification Number: 10.1109/ATC.2018.8587500
Uncontrolled Keywords: Application specific integrated circuits; Computer architecture; Energy efficiency; Energy utilization; Hardware security; Internet of things; AES encryption; Box schemes; CMOS technology; Data paths; Energy efficient; low energy; Security implementations; Switching activities; Cryptography
Additional Information: Conference code: 143867. Language of original document: English.
URI: http://eprints.lqdtu.edu.vn/id/eprint/9471

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